74HC126PW,118

74HC126PW,118 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. This device inputs include clamp diodes. This enables the use of current-limiting resistors to interface inputs to voltages in excess of VCC. It complies with JEDEC standards (JESD8C (2.7 V to 3.6 V), JESD7A (2V to 6V). It features ESD protection (HBM: ANSI/ESDA/Jedec JS-001 Class 2 exceeds 2000V).

• Wide supply voltage range from 2.0V to 6.0V
• CMOS low power dissipation, high noise immunity
• Latch-up performance exceeds 100mA per JESD 78 Class II Level B
• CMOS input levels, input leakage current is ±0.1μA max at (VI=VCC or GND;VCC = 6V, 25°C)
• Supply current is 8μA maximum at (VI=VCC or GND;IO = 0A;VCC = 6V, 25°C)
• Input capacitance is 3.5pF typical at (25°C)
• Propagation delay is 30ns typical at (VCC = 2.0V, 25°C)
• Operating temperature range from -40°C to +125°C
• TSSOP14 package

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