LCMXO3L-1300C-5BG256C

The LCMXO3L-1300C-5BG256C is an ultra-low density FPGA that supports the most advanced programmable bridging and IO expansion. It has the breakthrough IO density and the lowest cost per IO. The device IO features have the integrated support for latest industry standard IO. The MachXO3L family of low power, instant-on, non-volatile PLDs with look-up tables (LUTs). In addition to LUT-based, programmable logic it features Embedded Block RAM (EBR), Distributed RAM, Phase Locked Loops (PLLs), pre-engineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I²C controller and timer/counter. These features allow this device to be used in high volume consumer and system applications. The MachXO3L designed on a 65nm non-volatile low power process.

• Flexible architecture
• Pre-engineered source synchronous I/O
• High performance, flexible I/O buffer
• Flexible on-chip clocking
• Non-volatile, multi-time programmable
• TransFR reconfiguration
• Enhanced system level support