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Cantidad | Precio (sin IVA) |
---|---|
1+ | 6,750 € |
10+ | 5,860 € |
25+ | 5,510 € |
50+ | 5,460 € |
100+ | 5,420 € |
250+ | 5,370 € |
500+ | 4,890 € |
Información del producto
Resumen del producto
AS7C4098A-15JCN is a 5.0V 4Mb (256K × 16) CMOS fast SRAM. It is a high-performance CMOS 4,194,304-bit static random access memory (SRAM) device organized as 262,144 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20ns with output enable access times (tOE) of 5/6ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems. The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and read. LB controls the lower bits, I/O1–I/O8, and UB controls the higher bits, I/O9–I/O16. All chip inputs and outputs are TTL- and CMOS-compatible, and operation is for 5.0V supply.
- Center power and ground pins
- High speed, 10/12/15/20ns address access time, 5/6ns output enable access time
- Low power consumption, 990mW/max at 10ns (active), 55mW/max CMOS (standby)
- Individual byte read/write controls
- Easy memory expansion with active-low CE, active-low OE inputs
- TTL- and CMOS-compatible, three-state I/O
- 44-pin JEDEC standard packages
- ESD protection is ≥ 2000volts, latch-up current is ≥ 200mA
- 15ns access time, SOJ package
- Commercial temperature range from 0 to 70°C
Especificaciones técnicas
Asíncrono
256K x 16 bits
44Pins
5.5V
-
0°C
-
4Mbit
SOJ
4.5V
5V
Montaje en superficie
70°C
No SVHC (27-Jun-2024)
Documentos técnicos (1)
Legislación y medioambiente
País donde se realizó la mayor parte del proceso de producciónPaís de origen:Taiwan
País donde se realizó la mayor parte del proceso de producción
RoHS
RoHS
Certificado de conformidad del producto