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Quantity | Price (ex VAT) |
---|---|
1+ | € 11.160 |
10+ | € 8.120 |
50+ | € 7.410 |
100+ | € 7.140 |
250+ | € 7.070 |
500+ | € 6.990 |
Product Information
Product Overview
The DS1100LU-500+ is a 3.3V 5-tap economy timing element (delay line) in 8 pin µMAX package. It is characterized for operation over the range 3V to 3.6V. The DS1100LU-50+ delay line has five equally spaced taps. It is offered in surface-mount packages to save PCB area. This 5-tap silicon delay line reproduces the input-logic state at the output after a fixed delay of 500ns and it has 100ns delay time per tap. It is designed to reproduce both leading and trailing edges with equal precision. Each tap is capable of driving up to 10 74LS loads.
- Both leading and trailing edge accuracy
- Operating temperature range from -40°C to +85°C
- Delays are stable and precise
- Low power CMOS and TTL/CMOS compatible
- Vapour phase and IR solderable
- Clock & Timing
Applications
Clock & Timing
Notes
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
Technical Specifications
500ns
5
3.6V
8Pins
85°C
MSL 1 - Unlimited
100ns
3V
µMAX
-40°C
-
No SVHC (21-Jan-2025)
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate