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SN74LVC2T45DCTT - 

Transceptor, 74LVC245, 1.65 V a 5.5 V, SSOP-8

TEXAS INSTRUMENTS SN74LVC2T45DCTT

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Referencia del fabricante:
SN74LVC2T45DCTT
Código Farnell:
1470924RL

Información del producto

:
-
:
74LVC245
:
742T245
:
-40°C
:
SSOP
:
85°C
:
74LVC
:
1.65V
:
Cinta Cortada
:
5.5V
:
Transceptor, Sin Inversión
:
8Pines
:
-
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Resumen del producto

The SN74LVC2T45DCTT is a Dual-bit Non-inverting Bus Transceiver IC uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 to 5.5V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8, 2.5, 3.3 and 5V voltage nodes. It is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
  • Fully configurable dual-rail design allows each port to operate over 1.65 to 5.5V power supply range
  • VCC Isolation Feature, If Either VCC Input is at GND, Both Ports are in High-impedance State
  • DIR Input Circuit Referenced to VCCA
  • Low-power Consumption, 10µA Maximum ICC
  • ±24mA Output Drive at 3.3V
  • Ioff Supports Partial-power-down Mode Operation
  • 420Mbps(3.3 to 5V Translation) 210Mbps(Translate to 3.3V), 75Mbps (Translate to 1.8V) max data rates
  • Latch-up Performance Exceeds 100mA Per JESD 78, Class II
  • Green Product, No Sb/Br

Aplicaciones

Electrónica de Consumo, Industrial, Commercial, Comunicaciones y Red

Advertencias

Device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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